centralize credits

README

@@ -10,3 +10,17 @@ Communications; ISBN: 1-57398-013-7; 1st edition (June 14, 2000). See
 also http://pdos.csail.mit.edu/6.828/2006/v6.html, which provides
 pointers to on-line resources for v6.
 
+Code was used from the following sources:
+    JOS (asm.h, elf.h, mmu.h, bootasm.S, ide.c, and others)
+    Plan 9 (bootother.S, mp.h, mp.c, ioapic.h, lapic.c)
+    FreeBSD (ioapic.c)
+
+The following people made contributions:
+    Russ Cox (context switching, locking)
+    Cliff Frey (MP)
+    Xiao Yu (MP)
+
+If you spot errors or have suggestions for improvement, please send
+email to Frans Kaashoek and Robert Morris
+({kaashoek,rtm}@csail.mit.edu).  This version is the very first one,
+so don't be surprised if there are errors or the code is unclear.

asm.h

 //
 // macros to create x86 segments from assembler
-// from JOS
 //
 
 #define SEG_NULL						\

bootasm.S

-#
-# from JOS
-#
-        
 #include "asm.h"
 	
 .set PROT_MODE_CSEG,0x8		# code segment selector

bootother.S

@@ -14,7 +14,6 @@
  * mp.c puts the correct %esp in start-4, and the place to jump
  * to in start-8.
  *	
- * Credit: Cliff Frey and Plan 9
  */
 
 .set PROT_MODE_CSEG,0x8		# code segment selector

elf.h

 //
 // format of an ELF executable file
-// from JOS
 //
 
 #define ELF_MAGIC 0x464C457FU	/* "\x7FELF" in little endian */

lapic.c

@@ -7,11 +7,6 @@
 #include "mmu.h"
 #include "proc.h"
 
-
-/* 
- * Credit: Plan 9 sources, Intel MP spec, and Cliff Frey
- */
-
 enum {					/* Local APIC registers */
   LAPIC_ID  = 0x0020,	/* ID */
   LAPIC_VER = 0x0030,	/* Version */

mmu.h

 /*
  * This file contains definitions for the x86 memory management unit (MMU).
- * from JOS.
  */
 
 // Eflags register

mp.h

 /*
- * MultiProcessor Specification Version 1.[14].
+ * See MultiProcessor Specification Version 1.[14].
  *
- * Credit: Plan 9 sources
  */
 
 struct mp {			/* floating pointer */